ee:pcbdesign
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ee:pcbdesign [2021/10/08 09:35] FKR@staff.hsrw |
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| ==== Design considerations for self-etched PCBs at the university ==== | ==== Design considerations for self-etched PCBs at the university ==== | ||
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| + | The biggest PCB blanks we stock at the university are 160 mm by 100 mm. Your designs should not be bigger than that. | ||
| Available sizes for punching vias in the university: 0.6 mm (drill 0.9 mm, pad 1.5 mm) and 1.0 mm (drill 1.5 mm, pad 2.5 mm). | Available sizes for punching vias in the university: 0.6 mm (drill 0.9 mm, pad 1.5 mm) and 1.0 mm (drill 1.5 mm, pad 2.5 mm). | ||
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| - | Through-Hole Components need to be routed to at the bottom layer. | + | Through-hole (THT) components need to be routed to at the bottom layer. |
| ===== Common mistakes ===== | ===== Common mistakes ===== | ||
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| No prototyping/simulation | No prototyping/simulation | ||
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| + | ===== misc ===== | ||
| + | Use SMT footprints you can handle, e.g. 1206 for standard resistors and capacitors | ||
ee/pcbdesign.1633678544.txt.gz ยท Last modified: 2021/10/08 09:35 by FKR@staff.hsrw
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